HOME > Á¦Ç° ¼Ò°³ > Lattice > CPLD/SPLD > ispMACK 4000Z   
 
 
 
 
 
  13 - 32 §Ë ¼öÁØÀÇ ´ë±â Àü·ù
  25 - 62 §Ð ¼öÁØÀÇ Àü·Â ¼Òºñ
   
  3.5ns Pin-to-Pin µô·¹ÀÌ
  ÃÖ´ë 267MHz ½Ã½ºÅÛ µ¿ÀÛ
   
  4 ±Û·¯¹ú Ŭ·° Áö¿ø
  ·ÎÁ÷ºí·°´ç 36ÀÔ·Â Áö¿ø¿ø
  À¯¿¬ÇÑ ÄÁÆ®·Ñ°ú Clocking
  ORP¸¦ À§ÇÑ Pin Locking
  Density Migration
   
  1.8V µ¿ÀÛ Àü¿ø
  1.8V, 2.5V, 3.3V, I/O Áö¿ø
  5V Tolerant Áö¿ø
  Automotive : -40 to +130¡É
  IEEE 1532 In System Programmable (ISP¢â)
  IEEE 1149-1 Boundary Scan Test
  ³»ºÎ Pull-Up ¶Ç´Â Bus-Keeper ÀÔ·Â
  À¯¿¬ÇÑ ¹ö½º ÀÎÅÍÆäÀ̽º
  Hot Socketing
  3.3V PCI ȣȯ
  Lead-free ÆÐÅ°Áö ¿É¼Ç
   
ispMACH 4000Z (1.8 V)
Parameter
Typical Standby Current (¥ìA)
13
15
16
32
Density Macrocells
32
64
128
256
Speed
tPD
3.5
3.7
4.2
4.5
Fmax
267
250
220
200
Packages
User I/O & Inputs
48 TQFP
32+4
32+4
56 csBGA
32+4
32+12
100 TQFP
64+10
64+10
64+10
132 csBGA
64+10
96+4
96+6
176 TQFP
128+4